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SCIENCE CHINA Information Sciences, Volume 59, Issue 6: 061401(2016) https://doi.org/10.1007/s11432-016-5567-z

Looking into the future of Nanoelectronics in the Diversification Efficient Era

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  • ReceivedNov 24, 2015
  • AcceptedDec 22, 2015
  • PublishedMay 11, 2016

Abstract

The linear scaling of CMOS has encountered, since its beginning, many hurdles which request new process modules, driven mainly by the maximization of energy efficiency. Fabrication at the sub 10 nm node level will request Intrinsic Variability approaching to zero. The rapid growth of mobile, multifunctional and autonomous systems is hardly demanding to reach Zero Power consumption. The solutions to integrate Thin Film based devices, architectures and systems in order to face these challenges are described.


Acknowledgment

Acknowledgments

This work was supported by Nano 2017 CEA, LETI/STMicroelectronics/IBM Alliance Program, CEA/SOITEC Joint Program, Multiple Eureka and EU FP7 Projects, CEA ZeroPOVA and A3DN Flagship Programs.


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