logo

SCIENCE CHINA Information Sciences, Volume 60, Issue 10: 108401(2017) https://doi.org/10.1007/s11432-016-9041-5

Cost-effective SET-tolerant clock distribution network design by mitigating single event transient propagation

More info
  • ReceivedJan 19, 2017
  • AcceptedFeb 28, 2017
  • PublishedJul 12, 2017

Abstract

There is no abstract available for this article.


Acknowledgment

This work was supported by National Natural Science Foundation of China (Grant Nos. 61376109, 61434007).


References

[1] Chellappa S, Clark L T, Holbert K E. A 90-nm Radiation Hardened Clock Spine. IEEE Trans Nucl Sci, 2012, 59: 1020-1026 CrossRef ADS Google Scholar

[2] Seifert N, Shipley P, Pant M D, et al. Radiation-induced clock jitter and race. In: Proceedings of the 43rd Annual International Reliability Physics Symposium, San Jose, 2005. 215--222. Google Scholar

[3] Dash R, Garg R, Khatri S P, et al. SEU hardened clock regeneration circuits. In: Proceedings of the 10th International Symposium on Quality of Electronic Design, San Jose, 2009. 806--813. Google Scholar

[4] Chipana R, Kastensmidt F L. SET susceptibility analysis of clock tree and clock mesh topologies. In: Proceedings of the IEEE Computer Society Annual Symposium on VLSI, Tampa, 2014. 559--564. Google Scholar

[5] Chipana R, Kastensmidt F L, Tonfat J, et al. SET susceptibility estimation of clock tree networks from layout extraction. In: Proceedings of the 13th Latin American IEEE Test Workshop, Quito, 2012. 1--6. Google Scholar

[6] Mallajosyula A, Zarkesh-Ha P. A robust single event upset hardened clock distribution network. In: Proceedings of the International Integrated Reliability Workshop, S. Lake Tahoe, 2008. 121--124. Google Scholar

[7] Mavis D G, Eaton P H. SEU and SET modeling and mitigation in deep submicron technologies. In: Proceedings of the International Reliability Physics Symposium, Phoenix, 2007. 293--305. Google Scholar

Copyright 2020 Science China Press Co., Ltd. 《中国科学》杂志社有限责任公司 版权所有

京ICP备18024590号-1