SCIENTIA SINICA Informationis, Volume 48, Issue 2: 115-142(2018) https://doi.org/10.1360/N112017-00022

Recent progress in memristors for stimulating synaptic plasticity

Chenxi ZHANG1,2,3, Yan CHEN1,2,3, Mingdong YI1,2,3,*, Ying ZHU1,2,3, Tengfei LI1,2,3, Lutao LIU1,2,3, Laiyuan WANG1,2,3,*, Linghai XIE1,2,3, Wei HUANG1,2,3,4,5,*
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  • ReceivedJan 23, 2017
  • AcceptedJul 21, 2017
  • PublishedJan 8, 2018


With the rapid expansion of data information, modern computers based on the von Neumann architecture are facing severe challenges. Intelligent computers that can learn, store, and process information flexibly like a human brain will be the direction and goal of computers development. Brain controls almost all the complex life activities of human beings, and information transmission between cerebral neurons relies on the structure called “synapse, whose outstanding property — synaptic plasticity— is thought to be an important molecular basis of learning and memory. Therefore, it is widely believed that emulation of synapse and synaptic plasticity is the first step to realize effective artificial neural networks. Owing to the birth and development of the fourth fundamental passive circuit elements, memristors, which have unique nonlinear synaptic electrical transmission characteristics, it is possible to achieve this goal. Thus, over the past few years, a great deal of efforts have been made in mimicking synapse functions though memristors. In this review, recent simulations of synaptic plasticity using different memristor devices and various methods are comprehensively summarized, including short-term plasticity (paired-pulse depression, paired-pulse facilitation, and post-tetanic potentiation), long-term plasticity, spiking-rate-dependent plasticity, spiking-timing-dependent plasticity, learning experience, associative memory, and synaptic scaling. Finally, the current problems faced in the research and the development prospects in this area are briefly discussed.

Funded by






长江学者和创新团队(IRT_ 15R37)




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  • Figure 1

    (Color online) The connections between neurons. (a) A synapse is where a pre-synaptic neuron “connects with a post-synaptic neuron; (b) detail of synaptic junction [17]@Copyright 2009 Nature Publishing Group

  • Figure 2

    (Color online) Examples of experiments illustrating (a) LTP and (b) LTD. Synaptic weight, defined as the initial slope of the field excitatory postsynaptic potential (fEPSP slope) is plotted as a function of time [33]@Copyright 2008 Nature Publishing Group

  • Figure 3

    (Color online) (a) Ag/Si Memristor response to programming pulses (LTP/LTD). The device conductance can be incrementally increased or decreased by consecutive potentiating or depressing pulses. The conductance was measured at 1 V after each pulse and the read current is plotted. P, 3.2 V, 300 $\mu$s; D, $-$2.8 V, 300 $\mu$s @Copyright 2010 American Chemical Society; (b) magnitude of the paired-pulse facilitation (PPF) of a NiO$_{x}$-based memristor as a function of the pulse interval [1]@Copyright 2013 AIP Publishing LLC

  • Figure 4

    (Color online) (a) DC I-V curves of Pd/WO$_{x}$/W memristor studied here. Positive voltage sweeps (numberedprotectłinebreak 1 $\sim$ 5, +1.2 V, 2 V/s) and negative voltage sweeps (6 $\sim$ 10, $-$1.2 V, 2 V/s) increase and decrease the memristor conductance continuously, respectively; (b) schematic illustration of oxygen vacancy diffusion in the memristor device [20]@Copyright 2011 American Chemical Society

  • Figure 5

    (Color online) (a) A retention curve of the memristor; (b) a forgetting curve of human memory; (c) the voltage profile applied to the memristor, consisting of five +1.3 V, 1 ms pulses and a constant +0.3 V read voltage; (d) the corresponding current through the memristor data recorded continuously throughout the test [20]@Copyright 2011 American Chemical Society

  • Figure 6

    (Color online) (a),(b) Memory retention data recorded after different numbers of identical stimuli (dots) and fitted curves using the SEF (solid lines); (c) characteristic relaxation time ($\tau$) obtained and the current $I_{0}$ plotted with respect to the number of stimulations ($N$); (d) the distribution and diffusion of oxygen vacancy after the application of a number of stimulates [20]@Copyright 2011 American Chemical Society

  • Figure 7

    (Color online) (a) Current through the memristor recorded after each stimulation pulse, at different pulse interval conditions; (b) the current increase $\Delta~I~=~\Delta~I_{k}-~\Delta~I_{i}$ after every stimulus plotted against pulse number for different pulse interval conditions [20]@Copyright 2011 American Chemical Society

  • Figure 8

    (Color online) Implementation of the transition from short-term plasticity to long-term plasticity (and transition from short-term memory to long-term memory) in a Ag$_{2}$S memristor. (a) Application of pulses causes the precipitation of Ag atoms from the Ag$_{2}$S electrode, resulting in the formation of an Ag atomic bridge between the Ag$_{2}$S electrode and a counter metal electrode. When the precipitated Ag atoms do not form a bridge, the memristor works as short-term plasticity (and short-term memory). After an atomic bridge is formed, it works as long-term plasticity (and long-term memory); (b) and (c) changes in the conductance of the inorganic synapse caused by the input pulses with different pulse intervals. Smaller interval can more effectively realize the transition from short-term plasticity to long-term plasticity [10]@Copyright 2011 Nature Publishing Group

  • Figure 9

    (Color online) Schematic illustration of a Cu$_{2}$S gap-type atomic switch in sensory memory (SM), short-term memory (STM), and long-term memory (LTM) states depending on the interval ($T$) of the input voltage pulse stimulation. The conductance ($G$) for a single atomic contact is given by $G_{0}=~77.5$ $\mu$S [53]@Copyright 2012 John Wiley and Sons

  • Figure 10

    (Color online) Changes in the conductance ($G$) of a Cu$_{2}$S inorganic synapse in vacuum at room temperature depending on the interval ($T$), amplitude ($V$), and width ($W$) of the input voltage pulse stimulation. (a) $V$=150 mV, $W$=500 mS, $T$=10 s; (b) $V$=150 mV, $W$=500 mS, $T$=1 s; (c) $V$=100 mV, $W$=500 mS, $T$=10 s; (d) $V$=150 mV, $W$=50 mS, $T$=1 s; (e) $V$=100 mV, $W$=500 mS, $T$=1 s; (f) the values of time constant ($\tau$) extracted from the fits of the conductance decay curves shown in the dashed rectangular box in (c). An exponential function, $y~=~y_{0}+~A{\rm~e}^{-t/~\tau}$, was used to fit the conductance curves [53]@Copyright 2012 John Wiley and Sons

  • Figure 11

    (Color online) Change in conductance ($G$) under ambient conditions for voltage pulse of amplitude ($V$) 150 mV and width ($W$) 500 mS at an interval ($T$) of 10 s [53]protectłinebreak @Copyright 2012 John Wiley and Sons

  • Figure 12

    (Color online) Temperature dependence of conductance ($G$) of a Cu$_{2}$S inorganic synapse in vacuum for input voltage pulses of amplitude = 150 mV, interval = 1 s, and width = 500 mS [53]@Copyright 2012 John Wiley and Sons

  • Figure 13

    (Color online) Implementation of SRDP in the AIST memristor, dependence of synaptic modification on the frequency of the postsynaptic firing rate. For postsynaptic firing rates below $f_{\theta}$ (50 kHz), the synapse is depressed, while synaptic potentiation can be observed beyond $f_{\theta}$. The presynaptic rate is fixed at 50 kHz [16]@Copyright 2014 Nature Publishing Group

  • Figure 14

    (Color online) SRDP of Ta/EV(CLO$_{4}$)$_{2}$/BTPA-F/Pt memristor. (a) Schematic illustration of the Ta/EV(CLO$_{4}$)$_{2}$/BTPA-F/Pt memristor and the biological synapse, (b) current and (c) current change ($\Delta~I$) with ten voltage pulse stimulations at different frequencies [54]@Copyright 2016 John Wiley and Sons

  • Figure 15

    (Color online) (a) Pre- and post-synaptic membrane voltages for the situation of positive $\Delta~T$, result in positive $v_{\rm~MR}$; (b) Pre- and post-synaptic membrane voltages for the situation of negative $\Delta~T$, result in negative $v_{\rm~MR}$ [17]@Copyright 2009 Nature Publishing Group

  • Figure 16

    (Color online) STDP experiental curve of Bi and Poo [72]@Copyright 2009 Nature Publishing Group

  • Figure 17

    (Color online) Demonstration of STDP in the memristor synapse. (a) The measured change of the memristor synaptic weight vs the relative timing $\Delta~t$ of the neuron spikes; (b) the measured change in excitatory postsynaptic current (EPSC) of hippocampal neurons vs the relative timing $\Delta~t$ of the neuron spikes [1]@Copyright 2010 American Chemical Society

  • Figure 18

    (Color online) Implementation of STDP with nanosecond-scale time windows in the chalcogenide synapse with the (a) antisymmetric Hebbian learning rule, (b) antisymmetric anti-Hebbian learning rule, (c) symmetric Hebbian learning rule, and (d) symmetric anti-Hebbian learning rule. The red dots indicate the experimental data and the blue lines are the fitted curves. The insets show the pre- and postsynaptic spike schemes and fitting functions [73]@Copyright 2013 Nature Publishing Group

  • Figure 19

    (Color online) Demonstration of the memory and forgetting function of human brain

  • Figure 20

    (Color online) Demonstration of the “learning – forgetting – relearning process of EV(ClO$_{4}$)$_{2}$/BTPA-F memristor. (a) The $1^{\rm~st}$ learning stage; (b) the $1^{\rm~st}$ forgetting stage; (c) the $2^{\rm~nd}$ learning stage; (d) the $2^{\rm~nd}$ forgetting stage; (e) the $3^{\rm~rd}$ learning stage [54]@Copyright 2016 John Wiley and Sons

  • Figure 21

    (Color online) The LTP/STP and “learning-experience behaviours and the dynamic model of device operation. (a) The nearly linear increase in the synaptic weight with consecutive stimuli; (b) the spontaneous decay of the conductivity, i.e., the relaxation process of STP, which is similar to the human-memory “forgetting curve; (c) re-stimulation process, which is similar to the “relearning process [47]@Copyright 2012 John Wiley and Sons

  • Figure 22

    (Color online) (a) The neural circuits of Pickett: two Mott memristors M$_{1}$ and M$_{2}$, with a characteristic parallel capacitance (C$_{1}$ and C$_{2}$, respectively), voltage sources and output device, (b) a — super-threshold input 0.3 V,protectłinebreak b — super-threshold output 0.33 V, c — sub-threshold input 0.2 V, d — sub-threshold output 28 mV [75]@Copyright 2013 Nature Publishing Group

  • Figure 23

    (Color online) (a),(b) The implementation of habituation. (a) Schematic of stimulus trains used for this measurement; (b) measured device current changes under the application of stimulus trains. (c),(d) The dependence of the habituation habituation behavioural response on stimulation rate. (c) The variation of recorded currents after every 10 stimulation pulses at four different pulse interval; (d) current increase ($\Delta~I$) plotted against pulse number under different pulse interval conditions [87]@Copyright 2016 Royal Society of Chemistry

  • Figure 24

    (Color online) The implementation of sensitization. (a) The modulatory effect of NMOS transistor, the current measured under every gate voltage was represented by different colours; (b)two forms of measured currents changed against the repetition of two different stimulation trains respectively [87]@Copyright 2016 Royal Society of Chemistry

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