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SCIENTIA SINICA Informationis, Volume 49, Issue 1: 104-111(2019) https://doi.org/10.1360/N112018-00011

A real-time sampling and receiving algorithm based on time extension

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  • ReceivedJan 11, 2018
  • AcceptedMar 7, 2018
  • PublishedJan 9, 2019

Abstract

In this paper, a real-time sampling and receiving algorithm based on time expansion is proposed. The algorithm has been verified by FPGA (field programmable gate array). Two sets of square wave signals, the phases of which can be controlled, are generated by using DTC (digital to time converter) to control the emission of the signal and receiving ADC (analog to digital converter) sampling. The phase difference between the two signals is an arithmetic sequence by adjusting the frequency multiplication ratio of the PLL (phase locked loop) and the reference frequency of the input signal, the minimum phase difference is 62 ps. The high-frequency signal is sampled by low-frequency ADC, which greatly reduces the design difficulty of the system's power and hardware system, and increases the maintainability of the system. The equivalent sampling frequency can reach 16 GS/s. The algorithm is implemented on FPGA with Verilog HDL, and the verification is completed.


Funded by

国家自然科学基金(61625403)


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